I. Field of the Invention
This invention relates to a circuit for limiting the output voltage from a power transistor employed to drive a resonant electric load which is connected to a voltage supply and more particularly to a circuit for limiting the output voltage from a power transistor used to drive an ignition coil or transformer in an automobile.
II. Prior Art
Most automobiles currently use gasoline powered engines which rely on spark plugs to ignite a fuel mixture in a combustion chamber. The combustion applies pressure to a piston which ultimately provides power to the automobile. The spark plugs ignite the fuel mixture by providing a spark at a controlled time, typically just after the piston passes through what is commonly known as top dead center. The spark of a spark plug is created by applying a high voltage, typically 40,000 volts, across the gap of the spark plug. In the past, the high voltage necessary to create the spark was generated with ignition points, a condenser, and an ignition coil. However, modern cars have replaced the ignition points with electronic ignition modules which utilize power devices such as bipolar transistors.
The invention concerns in particular, but not exclusively, a power device used in the automotive industry for driving an ignition coil or a transformer. For this purpose, either a single transistor of the bipolar type, or a pair of transistors in a Darlington configuration, or a MOS type of transistor are used as the power element.
FIG. 1 shows a power transistor T1 which is periodically turned on and off by a driver circuit 1 as controlled by an appropriate input signal Vin. In essence, the power transistor acts as a switch (ignition points) which is open or closed by the input signal supplied to the driver circuit. With the switch in the closed state, a current flows through the load. As the switch is opened, a positive overvoltage establishes between the load and the switch which is followed by a series of negative voltage peaks dependent on the parasitic capacitances of the load and the way the energy which has been stored in the load is discharged upon the switch being opened. This positive overvoltage and series of negative voltage peaks are shown in FIG. 2. These negative voltage peaks pull the output voltage of the device several volts below ground level. Where the driver circuit and power device are provided in the integrated circuit form, certain parasitic components associate with the active components of the driver circuit which, as said voltage drops below ground level, enter a conduction state, thereby shorting out the active components of the driver circuit and impairing the operation of the latter.
More specifically with reference in particular to the example of FIG. 1, an electric load ZL, schematically represented by its equivalent electric circuit R-L-C, is connected to a circuit node at a voltage Vs. The load ZL is driven by a power device, specifically a bipolar transistor T1 of the NPN type, which is turned on and off by a signal from a driver circuit 1, known per se, under control by an appropriate input signal Vin. The output voltage of the power device is designated Vc.
Shown in FIG. 2 is the pattern vs. time of the voltage Vc when the transistor T1 is in the off state. It can be seen that a positive voltage first establishes itself at said node, followed by a series of negative voltage peaks. These negative voltage peaks will pull the output voltage of the device even several volts below ground level. With reference to FIG. 3, shown in vertical section therein is a portion of the integrated structure of the circuit illustrated by FIG. 1. This portion comprises an N+ doped substrate, indicated as region 2, wherein a power transistor T1 is formed whose collector, base and emitter regions are respectively defined by regions 3, 7 and 8. Formed in the region 2 as a part of the driver circuit 1, is a second transistor T4 whose collector, base and emitter regions are respectively defined by regions 4, 9 and 6. The transistor T4 is contained in an isolation well formed of a buried region 5 of the P type and two regions 10, 11 of the P+ type. The integrated structure just described implies the presence of two parasitic transistors T5 and T6. The base of the transistor T5 is in common with the collector of the transistor T6, formed in the region 4 of the N+ type, its emitter is formed in the region 9 of the P type, and its collector is in common with the base of the transistor T6, in the region 5 of the P type. Lastly, the emitter of the transistor T6 is formed within the region 3 of the N type. The connection pattern of the parasitic transistors TS, T6 is illustrated in FIG. 3 by a wiring diagram superimposed on the cross-sectional representation of the integrated structure.
In order to prevent the power device output from attaining a negative voltage value relative to ground, thereby triggering on the parasitic components, a circuit must be connected to that output which can provide real time control of the output voltage to hold it within predetermined limits. A known technical approach to providing such a limiter circuit is disclosed in U.S. Pat. No. 5,189,317 issued on Feb. 23, 1993 and is herein incorporated by reference. The limiter circuit described in U.S. Pat. No. 5,189,317 includes a comparator which performs a comparison of the output voltage from the power device with a predetermined reference voltage. Where the output voltage is slightly below the reference voltage, the comparator supplies the load with a current effective to prevent the output voltage from dropping below the reference voltage. This prior approach, while being advantageous from many aspects, is a structurally complex one and uses up an area of the integrated circuit which accounts for a significant proportion of the total area of the device. Its structural complexity unavoidably implies, moreover, such added disadvantages as increased cost and rate of device rejects.
Therefore, it is an object of the invention to provide a limiter circuit as indicated, which has such structural and functional features as to prevent the output of the power device, that is its collector connected to the load, from attaining a negative voltage relative to ground and triggering on the parasitic components.
It is further an object of the invention to decrease the cost and rate of device rejects by simplifying the prevention solution over prior art solutions.